Distributed Modeling of On-chip Power Distribution Networks Using Conformal Mapping and FDTD Method
نویسندگان
چکیده
This paper presents the modeling and simulation of simultaneous switching noise (SSN) in on-chip power distribution networks (PDN). The circuit model of power buses over lossy silicon substrate is extracted as frequency dependent RLGC elements. The coupling between conductors on adjacent layers is represented as coupling capacitors. Accurate analytical formulae are derived to extract the RLGC transmission line parameters and crossover capacitance using conformal mapping techniques. The effect of silicon substrate and mutual capacitance upon switching noise is demonstrated through a full chip power grid simulation using the Finite Difference Time Domain (FDTD) method along with Debye approximation.
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